1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for fabricating a semiconductor device capable of preventing a device failure.
2. Description of the Related Art
In order to satisfy demands for high integration and high performance of semiconductor devices, a metal interconnection with a multilayer structure has been widely used, and aluminum has been used for a metal interconnection. Recently, Copper (Cu) with superior conductivity has been widely used for the metal interconnection.
Since a copper interconnection layer is not easily patterned, the copper interconnection layer is mainly formed by a damascene process and a chemical mechanical polishing (CMP) process.
FIGS. 1 to 4 are diagrams illustrating the occurrence of various failures in the semiconductor devices of the related art.
As illustrated in FIG. 1, an insulating layer 110 is formed on a semiconductor substrate 100, and an inter-metal insulating layer 120 is formed on the insulating layer 110. The inter-metal insulating layer 120 has a trench 122 communicating with a via hole 121. A seed layer 130 is formed in order to easily fill copper in the via hole 121 and the trench 122. The seed layer 130 is formed through a sputtering process. When the seed layer 130 is formed through the sputtering process as described above, the copper may not be uniformly formed on the via hole 121 as indicated by A. That is, the seed layer 130 with a uniform thickness is not formed on the side of the via hole 121, and may have discontinuous step coverage. As the seed layer 130 has a narrower width, it may be difficult to form the seed layer 130.
As illustrated in FIG. 2, a copper interconnection 140 is formed by filling trench and via having the seed layer 130 therein with copper.
However, as illustrated in FIG. 1, in a state in which the seed layer 130 has discontinuous step coverage, when the copper interconnection 140 is formed, a failure such as a void 141 and/or a seam 142 (FIG. 3) may occur in the copper interconnection 140.
Further, when a subsequent process including thermal processing is performed, a failure such as void 143 may occur between the lower portion of the copper interconnection 140 and the insulating layer 110 due to thermal stress as indicated by arrows in FIG. 4. It is widely known that the void 143 occurs because copper may diffuse due to thermal stress.